Frequency Response of Transistor Amplifiers

Abstract

The discussions in the previous chapters concerned the mid-frequency performance of an amplifier. At these frequencies, the coupling and bypass capacitors pass the signals virtually unimpeded, while the transistor junction capacitors are considered to be open circuits. The BJT and FET models provided useful tools with which to analyse these circuits. The performance at low and high frequencies however requires further consideration. In the case of the low frequencies, the effect of the coupling and bypass capacitors needs to be determined while at high frequencies the response which is largely determined by transistor junction capacitances needs to be ascertained. In this chapter therefore, more complex equivalent circuits are introduced in order to examine the full frequency response characteristics of BJTs and FETs. While the analysis is done using the JFET, it applies in general to the MOSFET also. After completing the chapter, the reader will be able to

• Determine the low-frequency response of transistor amplifiers

• Determine the high-frequency response of transistor amplifiers

Problems

• 1. Determine the input coupling capacitor for the circuit shown in Fig. 6.65 in order that the amplifier have a low frequency cutoff frequency of 150 Hz. Assume transistor β = 125.

  Fig. 6.65

  

  Circuit for Question 1

• 2. For the amplifier circuit shown in Fig. 6.66 which is biased for maximum symmetrical swing, determine a suitable value of coupling capacitor to realize a maximum lower cut-off frequency of 70 Hz.

  Fig. 6.66

  

  Circuit for Question 2

• 3. Determine the output coupling capacitor C_o for the circuit shown in Fig. 6.67 in order that the amplifier has a low-frequency cut-off frequency of 50 Hz. Assume transistor β = 100.

  Fig. 6.67

  

  Circuit for Question 3

• 4. Determine C_E for the common emitter amplifier in Fig. 6.68 in order to produce a lower cut-off frequency of less than 25 Hz. Assume all coupling capacitors are large.

  Fig. 6.68

  

  Circuit for Question 4

• 5. Determine the capacitors C_i, C_S and C_o in the circuit of Fig. 6.69 to give f_L = 80 Hz. Assume h_fe = 200.

• 6. Evaluate the lower cut-off frequency resulting from each of the capacitors shown in Fig. 6.70.

• 7. A silicon NPN transistor has f_T = 200 MHz. Determine ${C}_{b^{\prime }e}$ for a collector current of 2 mA.

• 8. State and verify Miller’s theorem.

• 9. For the common emitter amplifier shown in Fig. 6.71, determine the upper cut-off frequency. The transistor used has f_T = 250 MHz, ${C}_{c{b}^{\prime }}=7\;\mathrm{pF}$ and β = 125.

• 10. Determine the upper cut-off frequency for the common base amplifier shown in Fig. 6.72 where a 2 N3904 transistor is used.

• 11. Determine the upper cut-off frequency for the common collector amplifier shown in Fig. 6.73 where a 2 N3904 transistor is used.

• 12. Find the cut-off frequency of the common source amplifier shown in Fig. 6.74. The JFET has the following characteristics: C_gs = 70 pF, C_gd = 8 pF, r_d = 150 kΩ, g_m = 10 mA/V.

• 13. Draw the equivalent circuit of the circuit in Fig. 6.74.

• 14. For a common gate JFET amplifier with R_S = 5 k and R_L = 6 k, using a JFET having C_gd = 4 pF, find the upper cut-off frequency of the circuit.

• 15. Explain the excellent wideband characteristics of the Cascode amplifier

• 16. Sketch a common emitter amplifier in which local series feedback is used to improve the amplifier bandwidth. For the maximum bandwidth, what should be the nature of the source resistance?

• 17. Sketch a common emitter amplifier in which local shunt feedback is used to improve the amplifier bandwidth. For the maximum bandwidth, what should be the nature of the source resistance? For the realization of a Cascode amplifier using a JFET as the second stage, what is the necessary characteristic of the JFET for this arrangement.

Fig. 6.69

Circuit for Question 5

Fig. 6.70

Circuit for Question 6

Fig. 6.71

Circuit for Question 9

Fig. 6.72

Circuit for Question 10

Fig. 6.73

Circuit for Question 11

Fig. 6.74

Circuit for Question 12