Passive–active integrators chaotic oscillator with anti-parallel diodes: analysis and its chaos-based encryption application to protect electrocardiogram signals Justin Roger Mboupda PoneSerdar ÇiçekMartin Kom OriginalPaper 13 November 2019 Pages: 1 - 15
Design and analysis of wide tuning range differential ring oscillator (WTR-DRO) G. K. SharmaA. K. JoharD. Boolchandani OriginalPaper 18 January 2020 Pages: 17 - 29
Realisation of some current-mode fractional-order VCOs/SRCOs using multiplication mode current conveyors K S. SubhadhraRavindra K. SharmaS. S. Gupta OriginalPaper 31 January 2020 Pages: 31 - 55
Complex dynamics of a novel 3D autonomous system without linear terms having line of equilibria: coexisting bifurcations and circuit design Rudolphe Wafo TapcheZeric Tabekoueng NjitackeFrançois Beceau Pelap OriginalPaper 29 January 2020 Pages: 57 - 71
Dynamics, control and symmetry breaking aspects of a modified van der Pol–Duffing oscillator, and its analog circuit implementation Léandre Kamdjeu KengneJustin Roger Mboupda PoneJacques Kengne OriginalPaper 28 February 2020 Pages: 73 - 93
A fully integrated parallel stages converter for thermal energy harvesting Roberto Rafael Flores QuinteroGuillermo Espinosa Flores-Verdad OriginalPaper 12 March 2020 Pages: 95 - 101
Common-mode interference and power conversion efficiency of differential rectifiers in RF energy harvesters Zemin LiuYu-Pin HsuMona M. Hella OriginalPaper 13 March 2020 Pages: 103 - 116
Applying design equations in particle swarm optimization for auto-sizing of multi-stage opamps: an experimental study Yuejing BenGuoyong Shi OriginalPaper 24 October 2019 Pages: 117 - 130
Optimization of thermal aware multilevel routing for 3D IC P. SivakumarK. PandiarajK. JeyaPrakash OriginalPaper 12 October 2019 Pages: 131 - 142
Convergence rates of the efficient global optimization algorithm for improving the design of analog circuits Nawel DriraMouna KottiEsteban Tlelo-Cuautle OriginalPaper 23 January 2020 Pages: 143 - 162
A full-transistor fine-grain multilevel delay element with compact regularity layout Bo LiuZhi-hui HuangQing-duan Meng OriginalPaper 03 February 2020 Pages: 163 - 172
A nature inspired optimization algorithm for VLSI fixed-outline floorplanning M. ShunmugathammalC. Christopher ColumbusS. Anand OriginalPaper 05 February 2020 Pages: 173 - 186
A semi-synchronous SAR ADC with variable DAC settling time using a DLL Georgi PanovAngel Popov OriginalPaper 23 March 2020 Pages: 187 - 194
A wideband blocker-resilient direct delta sigma receiver with selective input-impedance matching Faizan Ul HaqMikko EnglundJussi Ryynänen OriginalPaper Open access 17 March 2020 Pages: 195 - 207
An energy-efficient sample-and-hold circuit in CNTFET technology for high-speed applications Hamid MahmoodianMehdi Dolatshahi OriginalPaper 02 March 2020 Pages: 209 - 221
A 17 MS/s SAR ADC with energy-efficient switching strategy Sina MahdaviSarang KazeminiaKhayrollah Hadidi OriginalPaper 30 March 2020 Pages: 223 - 236