Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability T. Kalavathi DeviE. B. PriyankaA. Stephen Sagayaraj OriginalPaper 13 May 2021 Pages: 487 - 499
OptiPlace: optimized placement solution for mixed-size designs Prasun DattaShyamapada Mukherjee OriginalPaper 13 May 2021 Pages: 501 - 515
Soft-core embedded FPGA based system on chip Hajer SaidiMariem TurkiAbdulfattah Obeid OriginalPaper 19 May 2021 Pages: 517 - 533
Performance-binning and yield-improvement by clock-edge adjusted circuit for multi-Vdd multi-Vth designed chips Ching-Hwa Cheng OriginalPaper 28 April 2021 Pages: 535 - 544
Process evaluation in FinFET based 7T SRAM cell T. Santosh KumarSuman Lata Tripathi OriginalPaper 01 September 2021 Pages: 545 - 551
Using nano-scale QCA technology for designing fault-tolerant 2:1 multiplexer Linli WuZhangyi ShenYun Ji OriginalPaper 07 September 2021 Pages: 553 - 562
A new design of fault-tolerant digital comparator based on quantum-dot cellular automata Yun Ji OriginalPaper 10 August 2021 Pages: 563 - 570
A 223-\(\mu W\) single-to-differential RF mixer with 8.6dBm IIP3 using current-bleeding and body-effect for sub-6 GHz 5G applications S. Chrisben GladsonP. Siva PrasadBhaskar Manickam OriginalPaper 08 October 2021 Pages: 571 - 583
Design of bandpass–bandpass diplexers using rectangular-, T-, and L-shaped resonators for hybrid power amplifier and 5G applications Meisam TahmasbiFarhad RazaghianSobhan Roshani OriginalPaper 09 August 2021 Pages: 585 - 597
Optimal characterization of a microwave transistor using grey wolf algorithms Farzad KianiAmir SeyyedabbasiPeyman Mahouti OriginalPaper 12 July 2021 Pages: 599 - 609
Load-dependent power transfer efficiency for on-chip coils Joakim NilssonJohan BorgJonny Johansson OriginalPaper Open access 04 July 2021 Pages: 611 - 624
Coupled-line-based millimeter-wave CMOS spiral power dividers with tapered TLs Yo-Sheng LinJin-Fa ChangPing-Ting Yeh OriginalPaper 08 June 2021 Pages: 625 - 637
A 12-bit 10-MS/s SAR ADC with a weighted sampling time technique applied to C-DAC Min-Soo ShimMin-Seung KangKwang Yoon OriginalPaper 06 October 2021 Pages: 639 - 646
Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters Mateus B. CastroRaphael R. N. SouzaLeandro T. Manera OriginalPaper Open access 25 August 2021 Pages: 647 - 656
High-performance radiation hardened NMOS only Schmitt Trigger based latch designs Ambika Prasad ShahNeha GuptaMichael Waltl OriginalPaper 07 August 2021 Pages: 657 - 671
Design and verification of a high performance analog switch circuit Lin ZhangJieyu LiJun Luo OriginalPaper 24 February 2021 Pages: 673 - 681
Design analysis of GOS-HEFET on lower Subthreshold Swing SOI B. V. V. SatyanarayanaM. Durga Prakash OriginalPaper 21 March 2021 Pages: 683 - 694
Moving average filter for spur reduction in subsampling fractional PLLs Debdut Biswas Mixed Signal Letter 04 October 2021 Pages: 695 - 704