All-digital PLL using bulk-controlled varactor and pulse-based digitally controlled oscillator Hong-Yi HuangJen-Chieh Liu OriginalPaper 15 May 2011 Pages: 245 - 255
An all digital PLL with an active inductor DCO for LTE applications in 0.13 μm CMOS YoungGun PuAnSoo ParkKang-Yoon Lee OriginalPaper 13 May 2011 Pages: 257 - 268
A BiCMOS single ended multiband RF-amplifier and mixer with DC-offset and second order distortion suppression Tobias Tired OriginalPaper 02 April 2011 Pages: 269 - 283
Design and performance of a robust 180 nm CMOS standalone VCO and the integrated PLL Saiyu RenJohn EmmertRay Siferd OriginalPaper 01 May 2011 Pages: 285 - 298
CMOS second-harmonic quadrature voltage controlled oscillator using substrate for coupling Mohammad Jafar HemmatiSasan Naseh OriginalPaper 06 May 2011 Pages: 299 - 305
Linearization of oscillation frequency for integrated LC-VCO with inversion-mode varactor An HuVamsy P. Chodavarapu Mixed Signal Letter 10 May 2011 Pages: 307 - 314
Design of a 12-bit high-speed CMOS D/A converter using a new 3D digital decoder structure useful for wireless transmitter applications Peiman AliparastZiaadin Daei KoozehkananyJafar Sobhi OriginalPaper 05 May 2011 Pages: 315 - 328
4- and 6-GS/s 4-bit frequency-translating hybrid ADCs in 90-nm CMOS Shahrzad Jalali MazloumanSamad SheikhaeiShahriar Mirabbasi OriginalPaper 05 February 2011 Pages: 329 - 340
A 1.5 V 10-b 30-MS/s CMOS pipelined analog-to-digital converter Chi-Chang Lu OriginalPaper 08 January 2011 Pages: 341 - 347
Analog to digital converter for high density neural signal recording front-end in 90 nm Mohammad Hossein ZarifiShahin FarshchiJavad Frounchi OriginalPaper 15 February 2011 Pages: 349 - 355
Gain and offset correction methods for analog-to-digital converters Mustafa KeskinMark Chew Mixed Signal Letter 17 April 2011 Pages: 357 - 360
Half-Rate Duobinary Transmitter Architecture for Chip-to-Chip Interconnect Applications Mrigank SharadVijaya Sankara Rao PPradip Mandal OriginalPaper 03 April 2011 Pages: 361 - 377
Design of monostable–bistable transition logic element using the BiCMOS-based negative differential resistance circuit Kwang-Jow GanCher-Shiung TsaiWen-Kuan Yeh OriginalPaper 13 May 2011 Pages: 379 - 385
A high speed low jitter LVDS output driver for serial links Junsheng LvHao JuYumei Zhou OriginalPaper 26 May 2011 Pages: 387 - 395
