1. 0.2–4.35 GHz highly linear CMOS balun-LNA with substrate noise optimization

   • Dong Huang
   • Weiqiang Qian
   • Fujiang Lin

   OriginalPaper 23 April 2015 Pages: 285 - 293

   

2. Distributed LDO regulators in a 28 nm power delivery system

   • Inna Vaisband
   • Burt Price
   • Jeff Fischer

   OriginalPaper 26 April 2015 Pages: 295 - 309

   

3. Implementation of an ultra-low-power dynamic translinear loop at 0.25-V with Halo-implanted 130-nm MOSFETs

   • Odilon O. Dutra
   • Luís H. C. Ferreira
   • Tales C. Pimenta

   OriginalPaper 18 April 2015 Pages: 311 - 316

   

4. 24 Channel dual-band wireless neural recorder with activity-dependent power consumption

   • Srinjoy Mitra
   • Jan Putzeys
   • Refet Firat Yazicioglu

   OriginalPaper 24 April 2015 Pages: 317 - 329

   

5. Hybrid cascode compensation with current amplifiers for nano-scale three-stage amplifiers driving heavy capacitive loads

   • Hamed Aminzadeh
   • Ali Dashti

   OriginalPaper 05 April 2015 Pages: 331 - 341

   

6. Design and analysis of folded cascode OTAs using Gm/Id methodology based on flicker noise reduction

   • Meysam Akbari
   • Omid Hashemipour

   OriginalPaper 17 April 2015 Pages: 343 - 352

   

7. Modeling and optimization of a latched charge pump loaded by a resistive circuit

   • Jérôme Heitz
   • Vincent Frick
   • Luc Hébrard

   OriginalPaper 11 April 2015 Pages: 353 - 367

   

8. Analytical modeling of read noise margin of a CNFET based 6T SRAM cell

   • Priyanka Saha
   • Amit Jain
   • Subir Kumar Sarkar

   OriginalPaper 08 April 2015 Pages: 369 - 376